Advanced Micro Devices, AMD, has just unveiled the first generation of its Epyc line of processors build on Zen architecture. Starting with the 8-core, 16-thread chip on the EPYC 7251 at $400 per chip, the processors range all the way up to the 32-core, 64-thread EPYC 7601 at $4,000 per chip – cheaper than Intel equivalents, says AMD CVP Forrest Norrod.
The EPYC family was formerly known as “Naples”, and earlier this year we saw some of the features, such as the eight DDR4 memory controllers, the 128 PCIe lanes and support for one or two socket configurations. Today’s reveal shows a lot more.
The 8-core, 16-thread chip is at the heart of both EPYC as well as Ryzen processors, with the Ryzen using a single chip for desktops and the EPYC using four for servers.
The highlight of these chips is their interconnectivity via Infinity Fabric. Within each 8-core chip, IF is used to connect two 4-core blocks, each called a core complex. IF is used to connect chips within an MCM as well as to connect two sockets in two-processor configurations.
AMD also says that the power management across IF links gives EPYC processors an 8% performance boost per watt.
There are also 128 I/O channels in both the one socket and two socket configurations. In a two socket config, 64 channels from each processor are used for the Infinity Control Fabric connectivity, still leaving a total of 128 I/O channels available. Each system can have up to eight PCIe 3.0×16 connections.
Also of note are some of the differences between EPYC and Ryzen, one of these being maximum boost. The EPYC 7601, for example, can reach a maximum boost of 3.2 GHz with as many as 12 cores active, while the Ryzen typically has one or two cores active at maximum boost.
EPYC chips also have two options at boot: consistent power usage or consistent performance. In consistent power mode, the processor will maintain a tight power envelope but performance may vary; in consistent performance mode, you’ll get more consistent clock speeds, with more power being drawn as required.
Power management is more efficient on EPYC, so clock speeds are sometimes reduced based on workload patterns. For example, where there are bursts of activity with blocks of idle time in between, EPYC reduces clock speed so the activity takes longer, and the idle time is reduced. AMD says that this leads to overall power usage being reduced, arguing that controlling peak power draw is more important than having more idling time.
AMD’s core objective is to make the case for EPYC more compelling than Intel’s Broadwell-based Xeon Chips, which only afford 40 PCIe lanes per chip. EPYC also offers more consistency across the range of processors, with low-end parts not forsaking any of the security or reliability elements when compared to the top-end ones.
Early benchmarks, though limited, already show the EPYC 7601 as being superior to Xeon E5-2699A v4 processors, which are the fastest two-socket Xeon processors that Intel has.
AMD is also going after the next generation of Skylake-based Xeon server processors, which are due to be released soon, but that’s going to be a tougher fight to win. For one, Intel’s monolithic dies mean lower-latency memory access when compared to AMD’s MCMs. And Skylake-SP’s single-threaded performance is superior to that of Zen. Of course, EPYC does offer more memory bandwidth than Skylake-SP, and possibly more cores and threads per socket.
Even if AMD’s new processors come in a close second to Intel’s upcoming Skylake-SP core Xeons, Intel will finally have some meaningful competition in this space. If Ryzens are the Intel alternatives for desktop, then EPYCs could represent the same for servers, particularly in the growing data center space.
The best news yet is that Microsoft and Baidu have both committed to using EPYC in their data centers. Both are engaged in high levels of artificial intelligence workloads on cloud environments, so this could set the perfect precedent for other companies to follow.
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Sources: AMD, Bloomberg, ArsTechnica
